Classic Sorting Algorithm —- Packing Sort (C language implementation) FDK

2023-01-24   ES  

First of all, we must understand the clock source of each clock module. The following picture is the picture in the reference manual of the atomic brother.

First of all, let’s talk about the source of the clock (5 data marked in the figure). There are 5 clock source. Among them, PLLCLK (No. 5 clock in the figure) is converted from other clock source. Let me explain the five clock sources respectively.

(1) The No. 1 Clock Source in the HSI Figure is an internal high -speed clock. The clock frequency is 8MHz

(2) HSE is a high-speed outer clock, which can connect 4-16MHz crystal (crystal between chip PD0 and PD1).

(3) LSI low -speed internal clock, 40kHz is the only clock source of the independent watch dog, and it can also be used as the source of the clock of RTC

(4) LSE low -speed external clock source, connecting 32.768kHz crystals (between PC14 and PC15 pins), as the main clock source of RTC

(5) PLL clock source is HSI/2, HSE, HSE/2

Know the source of the clock, so let’s take a look at how these clocks are connected to the peripherals.

(1) Output through the MCO port (PA8) is used to select the following clocks (PLL duplex frequency, HSI, HSE, system clock) output for other peripheral use

(2) as the RTC clock source (the source is LSI, LSE, HSE/128)

(3) As a USB clock, it can be obtained by 1 or 1.5 times the frequency of the PLL clock source (the clock required for the USB port is 48MHz)

(4) SysClk clock source is PLL, HSI, HSE, and the maximum frequency is 72MHz overclocking.

Here the peripherals connected by SysCLK here are many. Let me do a detailed explanation one by one

① The system clock given to Cortex after 8 points is SYSTIC

② Send it directly to Cortex as a free run clock

③ Give the APB1 binocator, APB1 output all the way to APB1 peripheral use (PCLK1’s maximum frequency is 36MHz), and the other way to supply timer (TIM2.3.4) multiple frequency use

④ Give APB2 -point frequency, APB2 output all the way to APB2 peripheral use (PCLK2, the maximum frequency is 72MHz) another way to the timer TIM1 for use

The peripherals connected by APB1 and APB2 are further explained by the APB1 with low -speed peripherals on the APB1, and high -speed peripherals are connected on the APB2. See below


②UART1, SPI1, Timer1, ADC1, ADC2, all ordinary IO ports, the second function IO port, etc.


The above is my summary based on the information of the atomic brother


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